Achronix Speedster22i User Macro Guide Manuale Utente Scaricare il pdf (Pagina 117)

Memories BRAM80K

Speedster22i Macro Cell Library

AchronixSemiconductorProprietary PAGE 100

correctdataatbothoutputports.Inthiscase,thedatacorruptionwillnotbenoticedbythe

circuituntilthethecorruptedmemorylocationislaterread.

Timing Diagrams

Thetimingdiagramsforthefourcombinationsoftheporta_write_mode(portb_write_mode)

andporta_en_out_reg(portb_en_out_reg)parametersisshownbelow

Figure 6-3: Write-First, Latched Mode Timing Diagram

Figure 6-4: Write-First, Registered Mode Timing Diagram

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Achronix Speedster22i User Macro Guide Manuale Utente Pagina 117